How To Set Register In Lc3 To -99

In the previous post we talked about what emulators and virtual machines are, when they appeared, what is their current status and use.

What I want in this ready of articles is to explicate in a simple and summarized way how a reckoner works and the best mode to practise it is to create one, I don't mean physically, but rather an emulator. I will explain and write some code throughout the article. To implement the emulator I'll use Rust and the compages we are going to employ is from LC-3, since implementing an emulator for x86 is extremely laborious, fifty-fifty for an erstwhile system.

What is an compages?🔗

We can say that the compages of a computer is a fix of rules and methods that draw the functionality, organization and implementation of a computer arrangement.

An excellent example of a calculator architecture is the von Neumann architecture, which remains the foundation of well-nigh computers even today. This architecture was proposed by the brilliant mathematician John von Neumann, the person nosotros can dub the uncle of the electronic computer next to his father Alan Turing.

Von Neumann's architecture proposal for the electronic estimator in the twelvemonth 1945 is composed of five main parts, Control Unit of measurement (CU), Arithmetic and Logic Unit of measurement (ALU), memory, input and output (I/O). In today's computers the control unit and the ALU have merged to become what we know today as the CPU.

What we have been talking about so far is what is known every bit Organization Blueprint, but when it comes to figurer architecture, we tin can also refer to Didactics Set Architecture (ISA) or even a micro-architecture of the estimator.

Educational activity Set Architecture🔗

An ISA is like a programming linguistic communication embedded in the CPU that contains and defines data types, registers, ways of addressing retentiveness, fundamental functions to facilitate the creation of programs too as the I/O model. Some examples of well-known ISAs are x86, MIPS, and ARM. More recently yous tin can see a growing interest in RISC-V.

Equally mentioned above, to better sympathise how a computer works in its genesis we will apply a simplified architecture that has a reduced and simple ISA, specifically for learning; then we are going to utilise LC-three. The LC-3 is the perfect candidate because it is used by several universities to teach associates programming to students and because it has a very small educational activity ready compared to x86, but even then, it contains the foundations that a modern CPU also has.

Our Components🔗

As stated above for the creation of our emulator we will employ the Rust linguistic communication, every bit it is a modern system linguistic communication and I take a special amore. From now on, I will make a brief explanation of what we take to practise and follow up with code. At the end of each part I will put a link to GitHub where information technology contains all the code referring to each part.

It's fourth dimension to create a projection using Cargo and create two main modules. One will be to contain our emulator code and the other volition contain the lawmaking to interact with the emulator, the communication interface.

Memory🔗

The LC-iii is a 16-bit architecture, meaning that information technology has 65,536 possible memory locations (we tin know this past doing 2^16) and each with the capacity to store 16-bit values. This means that our automobile volition have a total of 128kb of RAM retentiveness. Information technology seems very picayune compared to modern computers, but I guarantee it will exist more than than enough for united states to run some interesting programs.

In our code retention will be represented by a simple vector. To minimally organize things, let'south create a separate module especially for memory, where later we'll implement some read and write functions.

                      /// Represents the size of a LC-3 memory.                        const                        MEMORY_SIZE            :                        usize = u16::            MAX                        as usize            ;                                                pub struct                        Memory                        {                                                /// Retentiveness is a vector of 65_536 positions                                      cells            :                          [            u16            ; MEMORY_SIZE],                        }

Registers🔗

Registers are an ultra-fast storage category that resides on the CPU itself. This type of storage is accessed in only one CPU wheel, which is extremely fast, equally memory normally takes more than than just ane cycle.

Some other peculiarity of registers is that they exercise not accept a memory address, that is, they are not addressable, but rather, affected and accessed through instructions (as we will see afterwards in this article). A regular CPU task is to exercise calculations, this is its great office forth with controlling the menses of execution. To make these calculations, the CPU has to employ these locations to temporarily store the values to be used in the operations. Since the number of registers is limited, the CPU is constantly loading values from memory into the registers and at the stop of operations put them dorsum into memory.

The LC-3 has a total of x registers, each exactly 16 bits long. Almost are for general employ, only some have limited access to their special functions:

8 general purpose registers (identifying as R0-R7)
1 register for the program counter (PC)
1 register with status flags (COND)

General purpose registers permit you to perform any adding that a program needs to run. The program counter is an unsigned integer register that contains the retention address of the adjacent teaching subsequently execution. And the condition flags are what provide relevant information about the last calculation performed.

To represent it in lawmaking, let's create a module to represent a CPU and inside it some other one to represent the registers.

                      /// LC-three CPU condition flags                        #[derive(Default)]                        pub struct                        Flags                        {}                                                /// LC-3 CPU registers                        #[derive(Default)]                        pub struct                        Registers                        {                                                /// General purpose register 0                                                pub                        r0            :                        u16            ,                                                /// General purpose annals one                                                pub                        r1            :                        u16            ,                                                /// General purpose register 2                                                pub                        r2            :                        u16            ,                                                /// General purpose register 3                                                pub                        r3            :                        u16            ,                                                /// General purpose register four                                                pub                        r4            :                        u16            ,                                                /// General purpose register 5                                                pub                        r5            :                        u16            ,                                                /// Full general purpose register 6                                                pub                        r6            :                        u16            ,                                                /// General purpose annals 7                                                pub                        r7            :                        u16            ,                                                /// Program counter                                                pub                        pc            :                        u16            ,                                                // Condition flags                                                pub                        flags            :                          Flags,                        }

To store the state of the CPU registers nosotros will utilize a struct, so we volition easily see what nosotros modify when implementing each CPU operation. Some other observation is that the structure of the flags for now is empty, since nosotros'll talk about them later.

The derive(Default) directive volition automatically implement the default values in the structures, in this instance zeroing out all integers and setting booleans to false. This will come in handy later when we have to initialize the structures.

Instructions🔗

Instructions are the commands nosotros can requite to the CPU. These instructions are fundamental operations, that is, they are uncomplicated operations like adding betwixt 2 numbers. Each instruction is formed by two parts, the opcode that indicates which task has to be executed and a office with the parameters of the operation, some instructions have no parameters.

Nosotros tin can expect at opcodes as a representation of what the CPU "knows how to do". The LC-three contains a total of 16 opcodes. Everything the estimator tin do and all the programs that we will run on it are just sequences of these 16 instructions.

Addition Instruction Structure — Addition Didactics Structure

The instructions are of fixed length, e'er occupying 16 bits long, the first 4 bits are for storing the opcode and the remaining bits are for the parameters.

In a futurity post we will talk in item nearly each of the instructions, what they practice and what effects they accept on the system. There are many ways to implement this role, but the most readable way and for educational purposes we will create an enumeration with all the instructions.

                      //! CPU instructions declaration and  decoder                                                /// LC-three Instructions                        pub enum                        Instructions                        {                                                /// co-operative                                      BR            ,                                                /// add                                      ADD            ,                                                /// load                                      LD            ,                                                /// store                                      ST            ,                                                /// leap register                                      JSR            ,                                                /// bitwise and                                      AND            ,                                                /// load register                                      LDR            ,                                                /// shop register                                      STR            ,                                                /// unused                                      RTI            ,                                                /// bitwise not                                      NOT            ,                                                /// load indirect                                      LDI            ,                                                /// store indirect                                      STI            ,                                                /// spring                                      JMP            ,                                                /// reserved (unused)                                      RES            ,                                                /// load effective address                                      LEA            ,                                                /// execute trap                                      TRAP            ,                        }

Notation: Equally we tin run across to a higher place, the LC-3 has a very reduced amount of instructions compared to x86. Other categories of architectures, such as ARM, which follow a RISC philosophy accept much less instructions than x86 (CISC), but at that place is no cardinal functioning missing. The big difference between CISC and RISC is that a CISC processor contains multiple complex instructions that require more CPU cycles and facilitate assembly writing, versus simpler and lighter RISC instructions that crave more than instructions to do more complex operations. Given the above, CISC is much more complex for engineers to design and produce a CPU. At that place is a reason why this has been so and why nosotros are witnessing a shift in CPUs that dominate our everyday lives. Here is a brief but complete explanation of some of the reasons.

Condition Flags🔗

The CPU needs a way to maintain state of the result of some operations, for instance, when there is an if x > 0 { … } compare operation. This state can be used by the next pedagogy to know, in this case, whether the condition is true or imitation. This is how it is possible to brand conditional jumps.

Each CPU has its variation of condition flags, in the example of the LC-3 there are only three:

Negative
Zero
Positive

These flags will say the sign of the previous choice. To represent them, let's add new properties to the Flags structure we created before.

                      /// LC-3 CPU condition flags                        pub struct                        Flags                        {                                                pub                        negative            :                        bool            ,                                                pub                        zero            :                        bool            ,                                                pub                        positive            :                        bool            ,                        }

Conclusion🔗

With this we end creating the base of operations components of our emulator. In the adjacent mail we will await at some LC-three assembly examples and how to implement some of the instructions. To see all the code implemented in this part delight admission GitHub.